The FEIP2-DSW is a dual-port, fixed configuration interface processor that provides two, 100-Mbps, IEEE 802.3u Fast Ethernet (FE) interface interfaces and the capability for Distributed Services (DS) and Distributed Switching (DSW). The dynamic random access memory (DRAM) configuration for the FEIP2-DSW is 32 megabytes (MB), and the standard static random access memory (SRAM) configuration is 2 MB.